This invention relates to an optical free space interconnect for ultra-high speed single instruction multiple data processors.
As the geometries of VLSI grow smaller and denser electronic interconnects and heat dissipation have been recognized as bottlenecks of advanced electronic computing systems. F. E. Kiamilev and et al., PERFORMANCE COMPARISON BETWEEN OPTOELECTRONIC AND VLSI MULTISTAGE INTERCONNECTION NETWORKS, J. Lightwave Tech., vol.9, pp. 1674-1692, 1991. M. R. Feldman, S. C. Esener, C. C. Guest, and S. H. Lee, COMPARISON BETWEEN OPTICAL AND ELECTRIC INTERCONNECTS BASED ON POWER AND SPEED CONSIDERATIONS, Appl, Opt., vol. 27, pp. 1742-1751, 1988.
Furthermore, as systems are operated at higher and higher speeds, the latency induced by electronic connections becomes a limiting factor. Although some new techniques, such as three dimensional multi-chip modules, have been developed to provide short connection distances and less latency, the basic limitation of the pin-out problem in electronic connections cannot be fully removed. L. D. Hutchson and P. Haugen, OPTICAL INTERCONNECTS REPLACE HARDWIRE, IEEE Spectrum., pp. 30-35, 1987.
Optical interconnections, because of their three-dimensional (3-D) processing capabilities and matched impedance characteristic, have been considered as the best alternative to electronic interconnections. Optical implementations of chip-to-chip and backplane-to-backplane interconnections have been reported. See, e.g. J. W. Goodman, OPTICAL INTERCONNECTIONS FOR VLSI SYSTEMS, Proc. IEEE, vol. 72, p. 850, 1984. Optical 3-D multi-stage interconnection networks have been investigated and realized. A. A. Sawchuk Proc. SPIE, vol. 813, p. 547, 1987. Recently, a new free space optical interconnect based on ring topologies was proposed by Y. Li, B. Ha, T. W. Wang, A. Katz, X. J. Lu, and E. Kanterakis Appl, Opt., vol. 31, p. 5548, 1992.
Arranging the input array on a ring, this novel architecture is capable of interconnecting many processors with identical latency and minimal complexity, and cost. This architecture is best suitable for the implementation of Single Instruction Multiple Data (SIMD) stream machines. Most topologies developed for rectangular array, such as Nearest Neighbor (NN), Plus Minus 2I (PM2I), and Hypercube can be implemented using this ring is topology. A simplified architecture of the ring topology architecture is depicted in FIG. 1. The optical interconnect has an input ring array 42 and an output ring array 45. The optical interconnect uses a first plurality of beamsplitters 23, 24, 25, 26, connected to the input ring array 42. The first plurality of beamsplitters 23, 24, 25, 26 is connected through a plurality of optical switches 27, 28, 29, 30, a plurality of dove prisms 56, 57, 58, 59 to a second plurality of beamsplitters 61, 62, 63, 64. A multiple channel system is used to perform a certain interconnection, i.e. a set of permutations. The number of channels depends on the topology to be realized. For example, to realize the NN type of interconnect shown in FIG. 2, a four channel system is needed.
Data is transferred between a plurality of processors. A plurality of light beams is produced. The light beams have at a particular time a single wave length. The single wavelength is selected from a plurality of wavelengths. Each light beam is uniquely associated with a processor. Each processor selectively modulates data onto its light beam. At a particular time, the selected wavelength of the single wavelength and the processors modulating data onto their light beam is controlled. The plurality of light beams is received at an input ring array. The light beams from the input ring array are transferred to an output ring array. Each light beam is rotated. Each selected wavelength is uniquely associated with a particular rotation. A light beam is output to each processor from the output ring array.